1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for performing optical analysis of trench depositions.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today""s manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed on a group of semiconductor wafers, sometimes referred to as a lot, using a semiconductor manufacturing tool called an exposure tool or a stepper. Typically, an etch process is then performed on the semiconductor wafers to form objects on the semiconductor wafer, each of which may function as a gate electrode for a transistor. Typically, shallow trench isolation (STI) structures formed on the semiconductor wafers being processed are filled by forming silicon oxide using tetraethoxysilane (TEOS), over the STI structures. The manufacturing tools communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1 illustrates a typical semiconductor wafer 105. The wafer 105 typically includes a plurality of individual semiconductor die arranged in a grid 150. Photolithography steps are typically performed by a stepper on approximately one to four die locations at a time, depending on the specific photomask employed. Photolithography steps are generally performed to form patterned layers of photoresist above one or more process layers that are to be patterned. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed on the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying ayer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features, such as a polysilicon line, or opening-type features, that are to be replicated in an underlying process layer.
Turning now to FIG. 2, a silicon substrate 210 that contains a plurality of layers 220, 230, is shown. In one embodiment, a layer of silicon nitride is added on the surface 215 of the silicon substrate 210, producing the layer 220. Trenches 240 are formed extending through layer 220 of silicon nitride and into the silicon substrate 210. Any of a variety of etching processes may be employed to create the trench 240. The trenches 240 in the silicon substrate 210 generally have a finite trench thickness 250. The trench thickness 250 extends from the bottom of the trench 240 to a top surface of the layer 220.
FIG. 2 also illustrates a pre-polished layer of TEOS material deposited on the silicon substrate 210, which is represented by layer 230. Typically, a layer of silicon dioxide is formed on the silicon substrate 210 and the silicon nitride layer 220, creating the layer 230. Ideally, the TEOS filling completely fills the trench thickness 250 (i.e., the thickness of the TEOS filling equals to the trench thickness 250).
Turning now to FIG. 3, a TEOS layer 230 is illustrated at a point in the manufacturing process where it has been polished down to approximately the trench thickness 250. The polishing process may leave the TEOS layer 230 with a thickness 350 that does not equal to the trench thickness 250. Furthermore, a dishing effect 310 (e.g., uneven filling of a trench) results from the polishing of the EOS layer 230. Generally, the polish process is controlled by measuring the trench thickness 250 and the fill thickness 350 and calculating a difference between the two thicknesses 250, 350. However, this process of calculating the difference in the thicknesses can cause errors during processing of semiconductor wafers.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one aspect of the present invention, a method is provided for performing trench depth analysis in semiconductor device manufacturing. A first processing on at least one semiconductor wafer is performed. Optical trench data is acquired from the processed semiconductor wafer. An optical trench analysis, based upon the optical trench data, is performed. A corrective feedback step is performed during a second processing of the semiconductor wafer in response to the optical trench analysis.
In another aspect of the present invention, a system is provided for performing trench depth analysis in semiconductor device manufacturing. The system of the present invention comprises: a computer system; a manufacturing model coupled with the computer system, the manufacturing model being capable of generating and modifying at least one control input parameter signal; a machine interface coupled with the manufacturing model, the machine interface being capable of receiving process recipes from the manufacturing model; a processing tool capable of processing semiconductor wafers and coupled with the machine interface, the first processing tool being capable of receiving at least one control input parameter signal from the machine interface; a metrology tool coupled with the first processing tool and the second processing tool, the metrology tool being capable of acquiring metrology data; an optical data reference library, the scatterometry reference library comprising optical data related to a plurality trench data; and an optical data error analysis unit coupled to the metrology tool and the optical data reference library, the optical data error analysis unit capable of comparing the metrology data to corresponding data in the optical data reference library and calculating at least one trench error.